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<PM> The ELiTE-Project

The ELiTE-Project is part of the FORTWIHR Project
It is located at the Operating Systems Group (IMMD IV) of the Computer Science Department at the University of Erlangen-Nürnberg.


Researchers

Frank Bellosa
Christoph Koppe
Martin Steckermeier

Project-Overview

Large caches used in scalable shared-memory architectures can avoid high memory access time only if data is referenced within the address scope of the cache. Consequently, locality is the key issue in multiprocessor performance. While CPU utilization still determines scheduling decisions of contemporary schedulers, we propose novel scheduling policies based on locality information derived from cache miss counters. A locality-conscious scheduler can reduce the costs for reloading the cache after each context switch. Thus, the potential benefit of using locality information increases with the frequency of scheduling decisions.

Lightweight threads have become a common abstraction in the field of programming languages and operating systems. User- level schedulers make frequent context switches affordable and therefore draw most profit from the usage of locality information if the lifetime of cachelines exceeds scheduling cycles.

One of the goals of the ELiTE project is to examine the performance implications of locality information usage in thread scheduling algorithms for scalable shared-memory multiprocessors. But the Erlangen Light-weight Thread Environment is not only a memory and locality conscious user level thread library. It addresses locality implications in user level as well as in kernel and implements a wide range of kernel support for user level thread scheduling.

The next part of this page gives an overview on the research topics in the ELiTE project. In the [papers and reports] sections you can access ascii-abscracts and full postscript versions of the ELiTE related documents.

  • Using locality information in user level scheduling [papers and reports]
  • Cache aware memory management and locality scheduling support in kernel [papers and reports]
  • Kernel support for user level thread scheduling [papers and reports]

    Publications and Technical Reports (sorted by research topic)
    Publications and Technical Reports (chronologically sorted)


    The ELiTE Project - HTML Documents

  • Follow-On Scheduling: Using TLB Information to Reduce Cache Misses (Abstract in HTML)
  • Process Cruise Control: Throttling Memory Access in a Soft Real-Time Environment (Abstract in HTML)
  • NUMA architectures and user level scheduling - a short introduction
  • Kernel support for preemptive user level scheduling - a diploma thesis in work
  • ... to be continued - look again from time to time