[an error occurred while processing this directive] RTSC: Experimental Results
Friedrich-Alexander-Universität Erlangen-Nürnberg  /   Technische Fakultät  /   Department Informatik

RTSC: Experimental Stage

Source Code of the Scheduler and Processing Node Assigner

is available here.

Experimental Results

Description OSEK OS source systems Visualization
Schedulability of the same random system set when whole tasks, subtasks or ABBs can be assigned to different cores Download
Comparison of analyzable systems when using the naive or our implementation with a fixed amount of 7GB RAM Download
Resource consumption for assigning and scheduling the same system on different numbers of cores Download
Effect of different scheduling grids on schedulability Download