Abstraction of the HPET existing in "modern" computers (since ~2005) More...

Classes
struct	AcpiTable

union	CapabilitiesAndIdRegister

struct	CapabilitiesAndIdRegister.__unnamed__

union	ConfigurationRegister

struct	ConfigurationRegister.__unnamed__

union	InterruptStatusRegister
	Global state register for interrupts. More...

class	Timer
	Class abstracting a single HPET comparator. More...

union	TimerConfigAndCapabilitiesRegister
	Configuration register for comparators. More...

struct	TimerConfigAndCapabilitiesRegister.__unnamed__

union	TimerFSBInterruptRouteRegister
	Front-Side Bus Interrupt Message Route Register. More...

struct	TimerFSBInterruptRouteRegister.__unnamed__

Typedefs
typedef uint64_t	TimerComparatorRegister
	Value register used by comparators. More...

Enumerations
enum	RegisterOffset { CAPABILITIES_AND_ID = 0x000, CONFIGURATION = 0x010, INTERRUPT_STATUS = 0x020, MAIN_COUNTER = 0x0f0, TIMER0_CONFIG_AND_CAPABILITIES = 0x100, TIMER0_COMPARATOR_VALUE = 0x108, TIMER0_FSB_INTERRUPT_ROUTE = 0x110, TIMER1_CONFIG_AND_CAPABILITIES = 0x120, TIMER1_COMPARATOR_VALUE = 0x128, TIMER1_FSB_INTERRUPT_ROUTE = 0x130, TIMER2_CONFIG_AND_CAPABILITIES = 0x140, TIMER2_COMPARATOR_VALUE = 0x148, TIMER2_FSB_INTERRUPT_ROUTE = 0x150 }

enum	CounterSize { SIZE_32BIT = 0x0, SIZE_64BIT = 0x1 }
	Size of the global counter and the comparators.

enum	CounterStatus { DISABLED = 0x0, ENABLED = 0x1 }
	State (enabled/disabled) for the global counter (and the comparators).

enum	InterruptStatus { DISABLED = 0x0, ENABLED = 0x1 }
	Interrupt state (enabled/disabled) for the global counter (and the comparators).

enum	TriggerMode { EDGE = 0x0, LEVEL = 0x1 }
	Trigger mode for the interrupts generated by a comparator.

enum	TimerMode { SINGLESHOT = 0x0, PERIODIC = 0x1 }
	Timer mode a comparator is running in.

Functions
bool	init ()
	Initializes the HPET system. More...

void	delay (unsigned usecs)
	Delays the caller's execution by approx. Actively waits by polling the main counter until at least the given micro seconds have passed. More...

bool	isEnabled ()
	Checks whether the HPET system is enabled. More...

void	enable ()
	Activate the HPET system. More...

void	disable ()
	Deactivate the HPET system. More...

size_t	numTimers ()

Timer *	getTimer (size_t index)
	Returns a pointer to the `index`th comparator. More...

Detailed Description

Abstraction of the HPET existing in "modern" computers (since ~2005)

Today's systems contain, in addition to the old Programmable Interval Timer (PIT), several additional timers, the "High Precision Event Timers" (HPET). Those timers, developed by Intel and Microsoft, are intended as replacement for both the PIT and the CMOS Real Time Clock (RTC) in the long run. Our implementation is based on the IA-PC HPET (High Precision Event Timers) Specification v1.0a.

Unlike the PIT, the HPETs are in a well-define state at system boot, are configured via Memory Mapped IO, have a significantly higher precision, and support up to 256 independent timers (depending on the architecture).

The HPET timers are implemented using a single counter and several comparators. The counter increments at a fixed frequency that is independent of the CPUs current frequency (which might change due to CPU power management). The only cause for reading a value smaller than previous values is a intermittent counter overflow.

After system boot, the HPET is in the following state:

The global counter is set to 0 and stopped.
The comparators' value registers are set to their maximum value.
All interrupts are disabled: a) The global activation bit is 0. b) Every comparators' interrupt-enable bit is set to 0 c) The legacy mode is disabled

Class Documentation

◆ HPET::CapabilitiesAndIdRegister

union HPET::CapabilitiesAndIdRegister

Class Members
struct CapabilitiesAndIdRegister	__unnamed__
uint64_t	value

◆ HPET::CapabilitiesAndIdRegister.unnamed

struct HPET::CapabilitiesAndIdRegister.__unnamed__

Class Members
uint64_t	revision_id: 8
uint64_t	last_timer: 5	index of the last comparator
uint64_t	counter_size: 1
uint64_t	legacy_route_capable: 1
uint64_t	vendor_id: 16
uint64_t	tick_frequency_fempto: 32	frequency of the main counter in femto seconds

◆ HPET::ConfigurationRegister

union HPET::ConfigurationRegister

Class Members
struct ConfigurationRegister	__unnamed__
uint64_t	value

◆ HPET::ConfigurationRegister.unnamed

struct HPET::ConfigurationRegister.__unnamed__

Class Members
uint64_t	enabled: 1	Enables/disables the HPET.
uint64_t	legacy_routing: 1	If both `enabled` and `legacy_routing` are set, interrupts will be sent using the (legacy) PIC instead of the IOAPIC. In addition, the PIT and RTC interrupt vectors will be used.

◆ HPET::InterruptStatusRegister

union HPET::InterruptStatusRegister

Global state register for interrupts.

For level-triggered interrupts, the register provides information about the comparator that issued an interrupt. To acknowledge the interrupt, the software is required to write 1 to the corresponding bit. Writes of 0 have no effect.

For edge-triggered interrupts, the corresponding bit is always set to 0 and should be ignored.

Class Members
uint64_t	timer0: 1
uint64_t	timer1: 1
uint64_t	timer2: 1
uint64_t uint64_t	value: 61

◆ HPET::TimerConfigAndCapabilitiesRegister

union HPET::TimerConfigAndCapabilitiesRegister

Configuration register for comparators.

In addition to global configuration and value registers, every HPET timer comes with its own configuration register containing config used locally by the respective timer.

Class Members
struct TimerConfigAndCapabilitiesRegister	__unnamed__
uint64_t	value

◆ HPET::TimerConfigAndCapabilitiesRegister.unnamed

struct HPET::TimerConfigAndCapabilitiesRegister.__unnamed__

Class Members
uint64_t	__pad0__: 1
uint64_t	interrupt_type: 1
uint64_t	interrupts_enabled: 1
uint64_t	mode: 1
uint64_t	periodic_capable: 1
uint64_t	timer_size: 1
uint64_t	set_value: 1	if set to 1, the accumulator can be set in software
uint64_t	small_mode: 1	if set to 1, the timer runs in 32-bit mode
uint64_t	ioapic_interrupt_vector: 5
uint64_t	fsb_interrupt_enabled: 1
uint64_t	fsb_interrupt_delivery: 1
uint64_t	interrupt_vecs: 32	bit mask containing the interrupt vectors for this timer

◆ HPET::TimerFSBInterruptRouteRegister

union HPET::TimerFSBInterruptRouteRegister

Front-Side Bus Interrupt Message Route Register.

Currently, this register is not used by StuBS; it's definition is here for the sake of completeness.

Class Members
struct TimerFSBInterruptRouteRegister	__unnamed__
uint64_t	value

◆ HPET::TimerFSBInterruptRouteRegister.unnamed

struct HPET::TimerFSBInterruptRouteRegister.__unnamed__

Class Members
uint32_t	interrupt_value
uint32_t	interrupt_address

Typedef Documentation

◆ TimerComparatorRegister

typedef uint64_t HPET::TimerComparatorRegister

Value register used by comparators.

The comparator value register yields a different behavior depending on the timer mode:

For single-shot timers, the interrupt is issued (if enabled) once, as soon as the global timer is equal to the configured value. When using 32-bit timers, an additional interrupt is issued when the global counter overflows.

For periodic timers, the mode of operation is as follows:

A first interrupt will be triggered when the global counter is equal to the value stored in this register.
From there on, the HPET will automatically increase the value by the initial period. Reading from this registers will return the point in time the next interrupt will be issued.

The specification guarantees that, after system boot, the value register contains the maximum value it can hold, that is 0xffffffff for 32-bit and 0xffffffffffffffff for 64-bit registers.

Note: For periodic timers, you need to reset the global counter to zero to guarantee that the first interrupt will be fired (and therefore the timer turns operational).; For periodic timers, you are not able to retrieve the period once the first interrupt was triggered. You need to store the period elsewhere.

Function Documentation

◆ init()

bool HPET::init ( )

Initializes the HPET system.

Returns: true on success, false on error

◆ delay()

void HPET::delay ( unsigned usecs )

Delays the caller's execution by approx. Actively waits by polling the main counter until at least the given micro seconds have passed.

Parameters

usecs time to wait in micro seconds.

◆ isEnabled()

bool HPET::isEnabled ( )

Checks whether the HPET system is enabled.

Checks whether the HPET system is activated globally, i.e. the global counter is running and the comparators could send interrupts (if configured to do so).

Returns: true if enabled, false if disabled

◆ enable()

void HPET::enable ( )

Activate the HPET system.

Activate the HPET system globally by enabling the global counter and, thereby, enabling all (previously configured) interrupts.

◆ disable()

void HPET::disable ( )

Deactivate the HPET system.

Deactivates the HPET system globally by disabling the global counter and, thereby, disabling all interrupts.

◆ getTimer()

Timer * HPET::getTimer ( size_t index )

Returns a pointer to the indexth comparator.

Returns: A pointer to the comparator, or nullptr if index is invalid.

Classes

Typedefs

Enumerations

Functions