OS-Directed Throttling of Processor Activity for Dynamic Power Management

Frank Bellosa, "OS-Directed Throttling of Processor Activity for Dynamic Power Management", Technical Report TR-I4-99-03, Department of Computer Science, University of Erlangen, June 1999, [Abstract(english)] [Full Paper (pdf), 49 kB]

Abstract:
Today, embedding fast processors in portable devices is infeasible because such battery operated systems cannot be supplied with enough power and cannot be kept cool for a reasonable period of time. Many processors offer the feature of reducible clock speed to save power. Reducing clock speed improves the performance-to-energy ratio for three reasons: First, the number of stall cycles that the CPU has to wait for main memory is reduced, because the clock-cycle time of the processor core gets closer to the memory latency. Second, by reducing the clock speed one can draw more energy out of batteries due to the impact of the lower discharge rate on the capacity of a battery. Finally, a reduced clock speed offers the possibility for further energy savings, because the supply voltage can be reduced as well. Our approach to OS-directed power management adds the clock speed to the runtime context of a thread. In addition to the questions when a thread has to be executed and which CPU should be used, we enlarge the freedom of scheduling to a third dimension: the speed of execution. By tuning the clock speed, the operating system can adjust the quality of service to the power constraints of a device.