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Dept. of Computer Science  >  CS 4  >  Research  >  RTSC

The Real-Time Systems Compiler

The Real-Time Systems Compiler (RTSC) aims at providing an operating system aware compiler that allows for a generic manipulation of the real-time systems architecture of a given real-time application. Hereby, manipulating the real-time systems architecture makes possible many interesting applications like migrating event-triggered to time-triggered systems and vice versa.

Recent Activity

Real-Time Systems Architectures

A real-time systems architecture provides means to arrange and coordinate the different concurrent tasks forming a real-time application. These measures comprise the activation of event handlers in response to the occurrence of an event, scheduling and dispatching these tasks to shared CPU and various mechanisms for unilateral (e.g. messages) and multilateral (e.g. mutexes) synchronization. Usually, such real-time systems architectures are implemented by an RTOS. The OSEK OS and AUTOSAR OS, for instance, implement event-triggered real-time systems architectures, whereas the OSEK time-triggered OS implements a strictly time-triggered real-time systems architecture.

Manipulating the real-time systems architecture of a real-time application demands for a proper abstraction to hide all its specific details without losing the necessary information of the structure of the real-time application. So, the mapping between the event handlers and the corresponding triggering events must be preserved just as the temporal properties of those events and inter-task dependencies resulting from unilateral and multilateral synchronization.

Within the RTSC we use Atomic Basic Blocks and a System Model to implement such an abstraction. Essentially, the RTSC uses ABBs to derive a global dependency graph based on an inter-procedural control flow graph from a real-time application given as source code. This dependency graph is annotated with temporal information of the executed code (e.g. worst case execution time) and the triggering events. Technically, the RTSC is designed as an operating system aware compiler and it implemented on-top of the LLVM and we exploit the control flow model of the LLVM to implement ABBs. Thereby, it is possible to perform the necessary control flow based manipulations of the real-time systems architecture and the RTSC significantly benefits from the powerful LLVM framework when it comes to standard compiler analyses and optimizations.

Related Projects

The RTSC serves as the main research vehicle within the ABB and the AORTA research projects. In the ABB project we initially developed our first ideas towards generically manipulating the real-time systems architecture and came up with Atomic Basic Blocks to provide an appropriate intermediate representation for a tool like the RTSC. In the course of this project, we also created the first prototype of the RTSC. The follow-up project AORTA serves the purpose to further investigate the potential of ABBs.


If you are interested in the RTSC,
Atomic Basic Blocks or AORTA, do not hesitate to get in touch with Fabian Scheler either via eMail, phone or personally.
  Contact Last modified: 2013-07-10 09:22   scheler